555 Timer

Introduction

            The LM 555 Timer is a very  stable device for producing the time delays and oscillations. It is also used to produce square wave or clock pulse for other digital IC's. It has three modes of operation: Mono stable mode, Astable  mode and bistable mode. Monostabble mode is used to produce time delays. Time of delay is controlled by the external resistance and capacitor. Bistable mode is used to produce oscillations and frequency of oscillations is controlled by two external resistances and a capacitor. In bistable mode it behaves like a flip flop.

Pin Diagram

   

                             

Pin Description

             

          Pin no. 1: GND

                                      Ground reference voltage

          Pin no. 2:  Trigger   

                          Responsible for the transition of flip flop.

          Pin no. 3: Output     

                         Output of 555 timer   

                           

          Pin no. 4:   Reset     

                           Negative pulse on this pin resets the timer. When not used for reset it must be connected to Vcc to avoid false triggering

         Pin no. 5:  Control Voltage    

                         Controls the threshold and trigger levels

                                                                      

         Pin no. 6: Threshold               

                          Compares the voltage applied to this terminal with the reference of 2/3 Vcc              

        

         Pin no. 7:Discharge     

                       Open collector output which discharges a capacitor between intervals. It toggles the output from high to low  when voltage reaches 2/3 of the supply voltage

                                 

        Pin no. 8: Vcc  

                          Supply voltage       

Block Diagram    

    

       

                        

Components

            

       Comparator: The Comparator are the basic electronic component which compares the two input voltages i.e. between the inverting (-) and the non-inverting (+) input and if the non-inverting input is more than the inverting input then the output of the comparator is high. Also the input resistance of an ideal comparator is infinite.

        Voltage Divider: As we know that the input resistance of the comparators is infinite hence the input voltage is divided equally between the three resistors. The value being V_in/3 across each resistor.

         Flip-Flop: Flip-Flop is a memory element of Digital-electronics. The output (Q) of the flip/flop is ‘high’ if the input at ‘S’ terminal is ‘high’ and ‘R’ is at ‘Low’ and the output (Q) is ‘low’ when the input at ‘S’ is ‘low’ and at ‘R’ is high.

         Transistor: It is used to discharge the capacitor. When flip flop is triggers this transistors disconnects the capacitor from ground and when threshold voltage increases from 2/3 Vcc flip flop toggles and capacitor is connected to ground and gets discharged.

Operating Modes

Monostable Mode

               In this mode the timer operates as one shot. Intially capacitor is kept discharged using transistor. When voltage at the trigger pin drops below 1/3 Vcc the flip flop is set which removes the short circuit condition from the external capacitor and also sets the output of the timer to high. Then capacitor charges through the resistance and the voltage across the capacitor rises exponentially and after some period t=1.1RC when voltage across the capacitor becomes equal to 2/3 Vcc  then the comparator resets the flip flop due to which capacitor gets discharged and output becomes low.

                          

   Astable mode

             In this mode the timer trigger itself and runs as oscillator. The capacitor gets charged through R1 and R2 and discharged through R2. Therefore duty cycle can be changed by changing the ratio of two resistances.

                                

       Charge time is given by 

                 t1=0.693(R1+R2)C

    

       Discharge time is given by 

                t2=0.693R2C  

       Total time period

                T=t1+t2=0.693(R1+2R2)C

       Frequency  

               f=1/T=1/0.693(R1+2R2)C

  

       Duty Cycle

               D=R2/R1+2R2

Bistable Mode

              In bistable mode the timer is stable in both states. It behaves like a flip flop. In this mode time of the state does not depends on the value of external resistances and capacitor. With trigger pulse it goes to high state and with reset it goes to low state.